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| MC33076 Dual High Output Current, Low Power, Low Noise Bipolar Operational Amplifier The MC33076 operational amplifier employs bipolar technology with innovative high performance concepts for audio and industrial applications. This device uses high frequency PNP input transistors to improve frequency response. In addition, the amplifier provides high output current drive capability while minimizing the drain current. The all NPN output stage exhibits no deadband crossover distortion, large output voltage swing, excellent phase and gain margins, low open loop high frequency output impedance and symmetrical source and sink AC frequency performance. The MC33076 is tested over the automotive temperature range and is available in an 8-pin SOIC package (D suffix) and in the standard 8 pin DIP package for high power applications. * 100 Output Drive Capability * Large Output Voltage Swing * Low Total Harmonic Distortion * High Gain Bandwidth: 7.4 MHz * High Slew Rate: 2.6 V/s * Dual Supply Operation: 2.0 V to 18 V * High Output Current: ISC = 250 mA typ * Similar Performance to MC33178 VCC http://onsemi.com MARKING DIAGRAMS 8 PDIP-8 P1 SUFFIX CASE 626 1 1 8 SO-8 D SUFFIX CASE 751 1 33076 ALYW MC33076P1 AWL YYWW 8 8 1 A WL, L YY, Y WW, W = Assembly Location = Wafer Lot = Year = Work Week PIN CONNECTIONS Output 1 Iref Iref Inputs 1 VEE 1 2 3 4 +1 8 7 2+ 6 5 VCC Output 2 Inputs 2 (8 Pin Pkg, Top View) VinVin+ CC CM Vout ORDERING INFORMATION Device MC33076D MC33076DR2 MC33076P1 Package SO-8 SO-8 PDIP-8 Shipping 98 Units/Rail 2500 Tape & Reel 50 Units/Rail VEE Figure 1. Equivalent Circuit Schematic (Each Amplifier) (c) Semiconductor Components Industries, LLC, 2001 1 February, 2001 - Rev. 1 Publication Order Number: MC33076/D MC33076 MAXIMUM RATINGS Rating Power Supply Voltage (Note 2.) Input Differential Voltage Range Input Voltage Range Output Short Circuit Duration (Note 2.) Maximum Junction Temperature Storage Temperature Maximum Power Dissipation Symbol VCC to VEE VIDR VIR tSC TJ Tstg PD Value +36 Note 1. Note 1. 5.0 +150 -60 to +150 Note 2. Unit V V V sec C C mW 1. Either or both input voltages should not exceed VCC or VEE. 2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded (see power dissipation performance characteristic, Figure 2). See applications section for further information. DC ELECTRICAL CHARACTERICISTICS (VCC = +15 V, VEE = -15 V, TA = 25C, unless otherwise noted.) Characteristics Input Offset Voltage (RS = 50 , VCM = 0 V) (VS = 2.5 V to 15 V) TA = +25C TA = -40 to +85C Input Offset Voltage Temperature Coefficient (RS = 50 , VCM = 0 V) TA = -40 to +85C Input Bias Current (VCM = 0 V) TA = +25C TA = -40 to +85C Input Offset Current (VCM = 0 V) TA = +25C TA = -40 to +85C Common Mode Input Voltage Range Large Signal Voltage Gain (VO = -10 V to +10 V) (TA = +25C) RL = 100 RL = 600 (TA = -40 to +85C) RL = 600 Output Voltage Swing (VID = 1.0 V) (VCC = +15 V, VEE = -15 V) RL = 100 RL = 100 RL = 600 RL = 600 (VCC = +2.5 V, VEE = -2.5 V) RL = 100 RL = 100 Common Mode Rejection (Vin = 13 V) Power Supply Rejection (VCC/VEE = +15 V/-15 V, +5.0 V/-15 V, +15 V/-5.0 V) 6 7 4, 5 Figure 3 Symbol |VIO| - - VIO/T - IIB - - |IIO| - - VICR AVOL 25 50 25 8, 9, 10 VO+ VO- VO+ VO- VO+ VO- 11 12 CMR PSR 80 120 - 10 - 13 - 1.2 - 80 +11.7 -11.7 +13.8 -13.8 +1.66 -1.74 116 - -10 - -13 - -1.2 - dB dB - 200 - - - - V -13 5.0 - -14 +14 70 100 V 13 kV/V 100 - 500 600 nA 2.0 - nA 0.5 0.5 4.0 5.0 V/C Min Typ Max Unit mV http://onsemi.com 2 MC33076 DC ELECTRICAL CHARACTERICISTICS (VCC = +15 V, VEE = -15 V, TA = 25C, unless otherwise noted.) Characteristics Output Short Circuit Current (VID = 1.0 V Output to Gnd) (VCC = +15 V, VEE = -15 V) Source Sink (VCC = +2.5 V, VEE = -2.5 V) Source Sink Power Supply Current per Amplifier (VO = 0 V) (VS = 2.5 V to 15 V) TA = +25C TA = -40 to +85C Figure 13, 14 Symbol ISC 190 - 63 - 15 ID - - 2.2 - 2.8 3.3 +250 -280 +94 -80 - -215 - -46 mA Min Typ Max Unit mA AC ELECTRICAL CHARACTERICISTICS (VCC = +15 V, VEE = -15 V, TA = 25C, unless otherwise noted.) Characteristics Slew Rate (Vin = -10 V to +10 V, RL = 100 , CL = 100 pF, AV = 1.0) Gain Bandwidth Product (f = 20 kHz) Unity Gain Bandwidth (Open Loop) (RL = 600 , CL = 0 pF) Gain Margin (RL = 600 , CL = 0 pF) Phase Margin (RL = 600 , CL = 0 pF) Channel Separation (f = 100 Hz to 20 kHz) Power Bandwidth (VO = 20 Vpp, RL = 600 , THD 1%) Total Harmonic Distortion (RL = 600 , VO = 2.0 Vpp, AV = 1.0) f = 1.0 kHz f = 10 kHz f = 20 kHz Open Loop Output Impedance (VO = 0 V, f = 2.5 MHz, AV = 10) Differential Input Resistance (VCM = 0 V) Differential Input Capacitance (VCM = 0 V) Equivalent Input Noise Voltage (RS = 100 ) f = 10 Hz f = 1.0 kHz Equivalent Input Noise Current f = 10 Hz f = 1.0 kHz Figure 16 17 - 20, 21 20, 21 22 - 23 Symbol SR GBW BW Am m CS BWp THD - - - 24 - - 25 |ZO| Rin Cin en - - - in - - 0.33 0.15 - - 7.5 5.0 - pA/Hz - - - 0.0027 0.011 0.022 75 200 10 - - - - - - k pF nV/Hz Min 1.2 4.0 - - - - - Typ 2.6 7.4 3.5 15 52 -120 32 Max - - - - - - - Unit V/s MHz MHz dB Deg dB kHz % http://onsemi.com 3 MC33076 PD, MAXIMUM POWER DISSIPATION (mW) 4000 3500 3000 2500 2000 1500 1000 500 0 -60 -30 MC33076D 0 30 60 90 TA, AMBIENT TEMPERATURE (C) 120 150 MC33076P1 PERCENTAGE OF AMPLIFIERS (%) 25 20 15 10 5 0 -2.0 180 amplifiers tested from 3 wafer lots VCC = 15 V TA = 25C (Plastic DIP package) -1.5 -1.0 -0.5 0 0.5 1.0 1.5 VIO, INPUT OFFSET VOLTAGE (mV) 2.0 2.5 Figure 2. Maximum Power Dissipation versus Temperature Figure 3. Distribution of Input Offset Voltage 250 I IB , INPUT BIAS CURRENT (nA) I IB , INPUT BIAS CURRENT (nA) 225 200 175 150 125 100 -15 -10 -5.0 0 5.0 10 15 VCC = +15 V VEE = -15 V TA = 25C 150 137 125 112 100 88 75 -55 -25 5.0 35 65 VCC = +15 V VEE = -15 V VCM = 0 V 95 125 TA, AMBIENT TEMPERATURE (C) VCM, COMMON MODE VOLTAGE (V) Figure 4. Input Bias Current versus Common Mode Voltage Figure 5. Input Bias Current versus Temperature VCC-0.25 VCC-0.50 VCC-0.75 VCC-1.0 VCC = +5.0 V to +18 V VEE = -5.0 V to -18 V VIO = 5.0 mV AVOL, OPEN LOOP VOLTAGE GAIN (dB) VCC 120 115 110 105 100 95 90 -55 RL = 2.0 k VEE+0.25 VEE+0.125 VEE -55 -25 5.0 35 65 TA, TEMPERATURE (C) 95 125 VCC = +15 V VEE = -15 V f = 10 Hz VO = -10 to +10 V -25 RL = 100 5.0 35 65 TA, AMBIENT TEMPERATURE (C) 95 125 Figure 6. Input Common Mode Voltage Range versus Temperature Figure 7. Open Loop Voltage Gain versus Temperature http://onsemi.com 4 MC33076 40 VO, OUTPUT VOLTAGE (Vpp ) 35 30 25 20 15 10 5.0 0 0 5.0 10 15 20 VCC, |VEE|, SUPPLY VOLTAGE (V) 25 TA = 25C RL = 10 k RL = 100 VO , OUTPUT VOLTAGE SWING (Vpp) 30 25 20 15 10 5.0 0 10 VS = 5.0 V TA = 25C f = 1.0 kHz VS = 15 V 100 1.0 k RL, LOAD RESISTANCE TO GROUND () 10 k Figure 8. Output Voltage Swing versus Supply Voltage Figure 9. Maximum Peak-to-Peak Output Voltage Swing versus Load Resistance VO, OUTPUT VOLTAGE (Vpp ) 20 15 10 5.0 0 100 VCC = +15 V VEE = -15 V RL = 100 AV = +1.0 THD = 1.0% TA = 25C 1.0 k 10 k f, FREQUENCY (Hz) 100 k 1.0 M CMR, COMMON MODE REJECTION (dB) 25 100 80 60 40 20 0 VCC = +15 V VEE = -15 V VCM = 0 V VCM = 1.5 V TA = -55 to +125C 10 100 1.0 k 10 k f, FREQUENCY (Hz) 100 k 1.0 M Figure 10. Output Voltage versus Frequency Figure 11. Common Mode Rejection versus Frequency Over Temperature PSR, POWER SUPPLY REJECTION (dB) 100 80 +PSR 60 40 20 0 |I SC |, OUTPUT SHORT CIRCUIT CURRENT (mA) 300 250 200 150 100 50 0 0 VCC = +15 V VEE = -15 V VID = 1.0 V 3.0 6.0 9.0 |VO|, OUTPUT VOLTAGE (V) 12 15 Source Sink VCC = +15 V VEE = -15 V VCC = 1.5 V TA = -55 to +125C 10 100 -PSR 1.0 k 10 k 100 k f, FREQUENCY (Hz) 1.0 M 10 M Figure 12. Power Supply Rejection versus Frequency Over Temperature Figure 13. Output Short Circuit Current versus Output Voltage http://onsemi.com 5 MC33076 |I SC |, OUTPUT SHORT CIRCUIT CURRENT (mA) 300 280 260 240 220 200 180 -55 VCC = +15 V VEE = -15 V VID = 1.0 V RL < 10 -25 5.0 35 65 TA, AMBIENT TEMPERATURE (C) 95 125 Source Sink I D, SUPPLY CURRENT/AMPLIFIER (mA) 320 5.0 4.0 3.0 2.0 1.0 0 TA = +125C TA = +25C TA = -55C 0 3.0 6.0 9.0 12 VCC |VEE|, SUPPLY VOLTAGE (V) 15 18 Figure 14. Output Short Circuit Current versus Temperature Figure 15. Supply Current versus Supply Voltage with No Load 3.0 2.5 SR, SLEW RATE (V/S) 2.0 1.5 1.0 0.5 0 -55 VCC = +15 V VEE = -15 V Vin = 20 Vpp -25 Vin + 100 GBW, GAIN BANDWIDTH PRODUCT (MHz) 8.5 8.0 7.5 7.0 6.5 6.0 5.5 -55 VCC = +15 V VEE = -15 V f = 100 Hz RL = 100 CL = 0 pF -25 5.0 35 65 TA, AMBIENT TEMPERATURE (C) 95 125 100pF 5.0 35 65 TA, AMBIENT TEMPERATURE (C) 95 125 Figure 16. Slew Rate versus Temperature Figure 17. Gain Bandwidth Product versus Temperature 50 30 10 1A 2A 2B 1B 80 120 160 200 1A) Phase, VS = 18 V 2A) Phase, VS = 1.5 V 1B) Gain, VS = 18 V 2B) Gain, VS = 1.5 V 1.0 M f, FREQUENCY (Hz) 10 M 240 280 30 M , EXCESS PHASE (DEGREES) 50 30 10 1B 2B 2A 10 M 1A 80 120 160 200 240 280 30 M , EXCESS PHASE (DEGREES) A V, VOLTAGE GAIN (dB) -10 -30 -50 100 k AV, VOLTAGE GAIN (dB) -10 -30 1A) Phase, (R = 100 ) 2A) Phase, (R = 100 , C = 300 pF) 1B) Gain, (R = 100 ) 2B) Gain, (R = 100 , C = 300 pF) 1.0 M f, FREQEUNCY (Hz) -50 100 k Figure 18. Voltage Gain and Phase versus Frequency Figure 19. Voltage Gain and Phase versus Frequency http://onsemi.com 6 MC33076 20 16 12 Gain Margin 50 m, PHASE MARGIN (DEGREES) m, PHASE MARGIN (DEGREES) 40 30 20 Phase Margin 10 0 12 k 60 50 40 30 20 10 0 0 Gain Margin Phase Margin VCC = +15 V VEE = -15 V VO = 0 V 16 14 12 10 8.0 6.0 4.0 2.0 400 800 1200 1600 0 2000 A m , OPEN LOOP GAIN MARGIN (dB) A m , GAIN MARGIN (dB) VCC = +15 V VEE = -15 V RT = R1 + R2 VO = 0 V TA = 25C 8.0 4.0 0 0 2.0 k 4.0 k 6.0 k 8.0 k 10 k RT, DIFFERENTIAL SOURCE RESISTANCE () CL, OUTPUT LOAD CAPACITANCE (pF) Figure 20. Phase Margin and Gain Margin versus Differential Source Resistance Figure 21. Open Loop Gain Margin and Phase Margin versus Output Load Capacitance THD, TOTAL HARMONIC DISTORTION (%) 140 CS, CHANNEL SEPARATION (dB) 130 120 110 100 90 80 70 100 Drive Channel VCC = +15 V VEE = -15 V RL = 100 TA = 25C 1.0 k 10 k f, FREQUENCY (Hz) 100 k 1.0 M 3.0 2.5 2.0 1.5 1.0 0.5 0 10 AV = +1000 AV = +100 100 1.0 k f, FREQUENCY (Hz) 10 k AV = +1 100 k AV = +10 VCC = +15 V VEE = -15 V RL = 100 VO = 2.0 Vpp TA = 25C Figure 22. Channel Separation versus Frequency Figure 23. Total Harmonic Distortion versus Frequency e n , INPUT REFERRED NOISE VOLTAGE (NV/ Hz) 100 ZO , OUTPUT IMPEDANCE ( ) 80 60 40 VCC = +15 V VEE = -15 V VCM = 0 V VO = 0 V TA = 25C 20 16 12 8.0 4.0 0 10 VCC = +15 V VEE = -15 V TA = 25C + VO Input Noise Voltage Test Circuit AV = 1000 20 AV = 100 AV = 10 0 10 k AV = 1.0 10 M 100 k 1.0 M f, FREQUENCY (Hz) 100 1.0 k f, FREQUENCY (Hz) 10 k 100 k Figure 24. Output Impedance versus Frequency Figure 25. Input Referred Noise Voltage versus Frequency http://onsemi.com 7 MC33076 100 os, PERCENT OVERSHOOT (%) 80 60 RL = 2.0 k 40 20 0 10 RL = 100 Copper Pad Copper Pad VCC = +15 V VEE = -15 V TA = 25C 100 1000 CL, LOAD CAPACITANCE (pF) 10 k Figure 26. Percent Overshoot versus Load Capacitance Figure 27. PC Board Heatsink Example APPLICATIONS INFORMATION The MC33076 dual operational amplifier is available in the standard 8-pin plastic dual-in-line (DIP) and surface mount packages, and also in a 16-pin batwing power package. To enhance the power dissipation capability of the power package, Pins 4, 5, 12, and 13 are tied together on the leadframe, giving it an ambient thermal resistance of 52C/W typically, in still air. The junction-to-ambient thermal resistance (RJA) can be decreased further by using a copper padb on the printed circuit board (as shown in Figure 27) to draw the heat away from the package. Care must be taken not to exceed the maximum junction temperature or damage to the device may occur. http://onsemi.com 8 MC33076 PACKAGE DIMENSIONS PDIP-8 P1 SUFFIX CASE 626-05 ISSUE L NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. DIM A B C D F G H J K L M N MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC --10_ 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC --10_ 0.030 0.040 8 5 -B- 1 4 F NOTE 2 -A- L C -T- SEATING PLANE J N D K M M TA M H G 0.13 (0.005) B M SO-8 D SUFFIX CASE 751-07 ISSUE W -X- A 8 5 B 1 4 S 0.25 (0.010) M Y M -Y- G C -Z- H D 0.25 (0.010) M SEATING PLANE K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D G H J K M N S MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244 N X 45 _ 0.10 (0.004) M J ZY S X S http://onsemi.com 9 MC33076 Notes http://onsemi.com 10 MC33076 Notes http://onsemi.com 11 MC33076 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com Fax Response Line: 303-675-2167 or 800-344-3810 Toll Free USA/Canada N. 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